Scientists used 7,000 GPUs to simulate a tiny quantum chip in extreme detail

"The computational model predicts how design decisions affect electromagnetic wave propagation in the chip," said Nonaka, "to make sure proper signal coupling occurs and avoid unwanted crosstalk."

To carry out this work, the team used ARTEMIS, an exascale modeling tool, to simulate and refine a quantum chip developed through a collaboration between Irfan Siddiqi's Quantum Nanoelectronics Laboratory at the University of California, Berkeley, and Berkeley Lab's Advanced Quantum Testbed (AQT). Yao will present this research in a technical demonstration at the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC25).

Quantum chip design combines elements of microwave engineering with the complexities of physics at extremely low temperatures. Because of this, a classical electromagnetic simulation platform like ARTEMIS, originally developed under the DOE's Exascale Computing Project, is well suited for studying these systems.

A Massive Supercomputer Tackles a Tiny Chip

Although not every simulation requires extreme computing resources, this project pushed the limits. To capture the fine details of a highly intricate chip, the team relied on nearly the full power of the Perlmutter supercomputer. Over 24 hours, they used almost all 7,168 NVIDIA GPUs to model a multilayer chip measuring just 10 millimeters across and 0.3 millimeters thick, with features as small as one micron.

"I'm not aware of anybody who's ever done physical modeling of microelectronic circuits at full Perlmutter system scale. We were using nearly 7,000 GPUs," said Nonaka. "We discretized the chip into 11 billion grid cells. We were able to run over a million time steps in seven hours, which allowed us to evaluate three circuit configurations within a single day on Perlmutter. These simulations would not have been possible in this time frame without the full system."

This level of precision sets the work apart. Many simulations simplify chips as "black boxes" because of computational limits, but access to thousands of GPUs allowed the researchers to model the actual physical structure and behavior of the device.

"We do full-wave physical-level simulation, meaning that we care about what material you use on the chip, the layout of the chip, how you wire the metal -- the niobium or other type of metal wires -- how you build the resonators, what's the size, what's the shape, what material you use," said Yao. "We care about those physical details, and we include them in our model."

Beyond structural detail, the simulation also recreates how the chip would behave during real experiments, including how qubits interact with each other and with the rest of the circuit.

Capturing Real-Time Quantum Behavior

By combining detailed physical modeling with time-based simulation, the researchers achieved something uncommon. Their approach uses Maxwell's equation in the time domain, allowing them to account for nonlinear effects and track how signals evolve.

Combining these qualities -- a focus on the physical chip design and the ability to simulate in real time -- is part of what made the simulation unique, said Yao: "The combination is instrumental, because we use the partial differential equation, Maxwell's equation, and we do it in the time domain so we can incorporate nonlinear behavior. All this adds up to give us one-of-a-kind capability."

The project was supported by NERSC through the Quantum Information Science @ Perlmutter program, which allocates computing time to promising quantum research efforts. Even within that program, this simulation stood out for its scale and ambition.

"This effort stands out as one of the most ambitious quantum projects on Perlmutter to date, using ARTEMIS and NERSC's computing capabilities to capture quantum hardware detail over more than four orders of magnitude," said Katie Klymko, a NERSC quantum computing engineer who worked on the project.

Next Steps for Quantum Chip Modeling

Looking ahead, the team plans to expand their simulations to gain a more precise understanding of the chip and how it performs within larger systems.

"We'd like to do a more quantitative simulation so that we can do a post-process and quantify the spectral behavior of the system," said Yao. "We'd like to see how the qubit is resonating with the rest of the circuit. In the frequency domain, we'd like to benchmark it with other frequency-domain simulations to give us greater confidence that, quantitatively, the simulation is correct."

Ultimately, the model will be tested against reality. Once the chip is fabricated and experimentally evaluated, the researchers will compare the results with their predictions and refine the simulation accordingly.

Yao and Nonaka emphasized that this achievement relied on close collaboration across Berkeley Lab and its partners, including AMCR, QSA, AQT, and NERSC, which provided both computing power and technical expertise. According to QSA director Bert de Jong, this effort represents an important step forward.

"This unprecedented simulation, made possible by a broad partnership among scientists and engineers, is a critical step forward to accelerate the design and development of quantum hardware," he said. "More powerful, more performant quantum chips will unlock new capabilities for researchers and open up new avenues in science."